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AMD has unveiled the first generation of Epyc, its new range of server processors built around its Zen architecture. Processors will range from the Epyc 7251 -- an eight-core, 16-thread chip running at 2.1 to 2.9GHz in a 120W power envelope -- up to the Epyc 7601: a 32-core, 64-thread monster running at 2.2 to 3.2GHz, with a 180W design power.
These chips are built on the same fundamental architecture as the company's Ryzen CPU cores, and they're aimed at the incredibly powerful data center market. AMD's 32-core / 64-thread Epyc CPUs combine four eight-core dies, each connected to the other via the company's Infinity Fabric. According to AMD, this approach is significantly cheaper than trying to pack 32 cores into a single monolithic die, that approach would leave the company potentially throwing away huge amounts of silicon during its production ramp. The Infinity Fabric is deliberately over-provisioned to minimize any problems with non-NUMA aware software, according to Anandtech. Each 32-core Epyc CPU will support eight memory channels and two DIMMs per channel, for a total maximum memory capacity of 2TB per socket, or 4TB of RAM in a two-socket system. Each CPU will also offer 128 lanes of PCI Express 3.0 support, enough to connect up to six GPUs at x16 each with room left over for I/O support. That's in a one-socket system, mind you. In a two-socket system, the total number of available PCI Express 3.0 lanes is unchanged, at 128 (64 PCIe 3.0 lanes are used to handle CPU -- CPU communication).

Learn more @ https://www.extremetech.com/computing/25...rver-chips
And more @ http://www.anandtech.com/show/11551/amds...c-analysis
Or even more @ http://www.zdnet.com/article/amd-epyc-wh...d-to-know/