[Merkuri]

CPU stand from Central Processing Unite, this is the hearth of the computer. The CPU execute instructions and manipulate data. The CPU has five components RAM, registers, buses,Arithmetic / Login Unit(ALU) and Control Unit(CU). We will look at each of the individually.

Registers – This is special type of memory which can be accessed really fast, all data must be represented in a register before it can be processed. The number of registers that a CPU has and the size of each , help determine the power and speed of a CPU. For example a 32bit CPU is one in which each register is 32 bits wide. Therefore, each CPU instruction can manipulate 32 bits of data.

Buses – Buses are the road for data. Buses are tiny wires that carry data between the components. The three buses we will take look are data, control and address bus.

RAM – Stand from Random Access Memory, this component provide a way to remember thing and a way to address them. Many time the circuitry that can remember is called latches and decoder is the circuitry that creates a way for individual memory locations to be selected.

Arithmetic / Login Unit(ALU) – This is the calculator of the CPU, this unit performs all mathematical calculations. The ALU can add, subtract, multiply, divide, and perform a host of other calculations on binary numbers.

Control Unit(CU) - this component is responsible for directing the flow of instructions and data within the CPU.

The CPU need two inputs to work – instructions and data. The instructions tells what the CPU to do with the data. The instructions are represented the same way as data, in binary system. Actually the CPUs don't make difference between data and instructions, this is why you can exploit a program but this isn't object of this tutorial. Also both inputs are stored on the same place(RAM). Here is what happens when you run a program:
1. The program(which is stored on the harddrive) is transferred to the RAM.
2. The CPU load the instructions from the RAM.
3. The CPU start processing the data.
What will happen next depend of the program and the user.

Measuring CPU speed

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We can measure the CPU speed with bits, cycles and execution corers.
Measuring CPU Clock cycles

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I decide to start with the most popular way of measuring CPU speed. The clock speed is how many times per second a charge of electricity passes through the chip. With other words this is how many instructions CPU can execute for a second. This is measured in Hertz[Hz] (or MHz or GHz(the most common today is GHz ). 2 GHz processor performs 2000000000 clock cycles per second. The fastest CPU has 8.79GHz cycles per second(more information: http://rog.asus.com/195782013/overclocki...-ever-cpu/).
More clock cycles usually means more processing capability and more speed.

Measuring speed with bits

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One way to measure the speed of CPU is to measure how many bits the CPU can process or transfer at once. Currently the fastest processors in this category can work with 64 bits. More bits usually means more processing capability and more speed.

Measuring speed with execution cores

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As the name says another way to measure the CPU power is to say how many cores the CPU have. A core is basicly a CPU in the CPU.The most advanced chips today have eight execution cores. More execution cores means you can get more work done at the same time but it doesn't necessarily mean a single program will run faster.

Architecutres

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Before you read about the CPU architectures I want to say what is thread. CPU view thread is an ordered sequence of instructions that tells the computer what to do. OS view is different from this. So basicly multithread CPU can execute multiple thread at once
RISC

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RISC stand from Reduced Instruction Set Computer. This architecture provide small number of instructions, but each of them can be executed for one cycle. The idea is to create more complex instructions with the basic one. The good about RISC architecture is that you have a lot more threads than the CISC architecture. Here are some CPU that use RISC:
MIPS, SPARC, Alpha, ARM, AVR, PA-RISC.

CISC

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CISC stand from Complex Instruction Set Computing. This is the opposite of RISC. It has a lot of complex instructions, that execute more basic one. The problem with this architecture is that you have little number of threads. The good is that you have more complex instructions. Here are some CPU that use CISC:
x86-64, x86, VAX

Instruction set

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The instruction set are the commands that human give to the CPU. They are also called instruction set architecture (ISA). The instruction set consists of multiple pieces, including addressing modes, instructions, native data types, registers, memory architecture, external I/O , and interrupt and exception handling. Here are some instructions for x86 architecture. The instructions get registers and store it into register. But there are instruction like jump for example that wouldn't use registers for input.

ADD – add two numbers
example:
ADD reg1, reg2 // this will take the value from reg1 and add it to reg2 finally the sum will be stored in reg3.
SUB –subtract two numbers. The actions are the same as the above example
JUMP – Jump to place in RAM
JUMP .print // This will jump in the address of .print
Every CPU architecture has it's own instructions.

Catches

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CPU cache is fast memory that is closer to the CPU. The CPU use it to reduce the average time to access memory. There are different levels of caches.
L1 This cache comes built in the CPU she is closed to the unit and it's fastest but has small size from 8KB up to 64 KB.
L2 cache is between the L1 cache and the RAM memory it's bigger than the L1 cache but she by far from the CPU.
Here is how caches are structured

Code:

        L1->L2->L3->RAM

When the CPU needs data it first check the L1 then L2 then L... till RAM.

Endianness

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Endian and endianness refer to the convention used to interpret the bytes making up a data word when those bytes are stored in computer memory. Before you continue reading you must have high level overview of memory, so I will start with this. The memory is an array of bytes(8 bits), each element in the memory has its own address(if you are familiar with programming you can think of the address as index). A word is 32 bits(4 bytes), so how would you access one word(32 bits) if each address has 8 bits of data, you need to access 4 address. The answer is that we split the 32 bit quantity into 4 bytes. Let's take this quantity as example 12AB34CD(16) have a 32 bit, written as hexadecimal. So the bytes are 12 AB 34 CD, each of which needs 2 hex digits. It turns that there are two ways to store it in the memory. Those ways are called big and little endian.
Before you continue reading you must now what is most and least significant bit(MSB and LSB). This is the bit position in a binary number having the greatest value. This is the first bit in the left side. The least significant bit is the first bit from the right side
1 00101 0
LSB MSB
0 01001 1
LSB MSB

*Note I'm not sure for all processors endianness I'm sure only that x86 and x86-64 are little endian for other I get the information from WWW.

Big endian

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In big endian, you store the most significant byte in the smallest address. Here is how we will store the address(12AB34CD) in big endian:

Code:

Address  // Value
0000        //   12
0001        //    AB
0002       //    34
0003       //    CD

Big endian processors:
ia64

Little endian

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In little endian you store the least significant byte in the smallest address. Here is how we will store the address(12AB34CD) in little endian:

Code:

Address // Value
0000      // CD
0001      //  34
0002      // AB
0003      // 12

Basicly the difference little endian is storing the bytes in reverse order.

Little endian processors:
x86
x86-64

bi endian

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Some architectures have setting which allows for switchable endianness in data segments, code segments or both. This feature can improve performance or simplify the logic of networking devices and software. Such architectures are ARM(version 3 or above) PowerPC, SPARC and others.

Images

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Here are a few image to make the tutorial more colored.
CPU organization

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Interl Core I7

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Another image that shows the CPU organization

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How the CU,ALU and registers communicate

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If you have any question you can leave a commend, I will answer ASAP.

[Shebang]

A good overview, but I'd like to point out that if you are going to directly copy from a website, leave it as a source. Only something I noticed on the Endianness section though.

http://en.m.wikipedia.org/wiki/Endianness

[Merkuri]

A good overview, but I'd like to point out that if you are going to directly copy from a website, leave it as a source. Only something I noticed on the Endianness section though.

http://en.m.wikipedia.org/wiki/Endianness

I didn't use wiki, I was listening to one explaination from lection which is in Bulgarian, and it this was just to refresh my memory. Also if you look at my definition you will see that it's a lot shorted. I didn't post link to the lecture firstly because it's in Bulgarian as I said and secondly the teacher made a few mistakes.

[MiS]

Just a small typo on the thread title, "Introduction" instead of "Introductio".

Coming from a rookie standpoint, this makes things a bit easier to understand. There's a few grammatical and spelling errors here and there, but other than those, I can make sense of things.